| Date | Topic | Reading | Handouts | Assignments |
|---|---|---|---|---|
| Aug 26 | Welcome Course Policies Intro to Digital | Chp 1 PPT | ||
| Aug 28 | No Class (Instructor Out) | |||
| Sep 2 | Basic Gates (and, or, not) Intro to Binary Lab Discussion | Chp 3 PPT Simulations | Lab 1 - Basic Logic Gates. Make sure you demo each circuit to the instructor for sign off. Due end of lab. Corrected Link to "The Pull-up Resistor" is https://archive.seattlerobotics.org/encoder/199703/basics.html | |
| Sep 4 | Basic Gates (cont) Number Systems | Number Systems (Bin, Hex, Oct) | Chp 2 PPT | HW #1 - Number Conversions (due Sep 9 at start of class). Submit via same link for instant feedback AND submit hand written work at start of class for credit and only one submission will be accepted for this assignment! |
| Sep 9 | Logic Circuits Combining Gates Deriving Truth Table Deriving Boolean Equation | Typed notes Simulations | HW #2 - Due next class (Sep 11) at start of class (paper copy). Lab #2 - Due end of lab. | |
| Sep 11 | Boolean Algebra | Notes (Prev Year, but same material) Boolean Algebra Rules Sheet | HW #3 Due start of next class (Sep 16). Turn in hand written work. | |
| Sep 16 | Boolean Algebra (Cont) | Notes (Prev Year, but same material) DeMoregan's Theorem Chp 7 (All About Circuits) | HW #4 Due at start of class Sep 23 Lab #3 - Due end of lab. | |
| Sep 18 | TEST #1 All material covered up to the start of boolean algebra (Lecture Sep 11), Lab #1 and Lab #2 (exclude question on boolean algebra minimization) | |||
| Sep 23 | Go over HW #4 SOP and Demorgan Universal Gates | SOP/POS Handout SOP/POS Simulation Universal Gates Universal Gate Simulation Unversal Gates full explanation Example Nand Gate Conversion | HW #5 Due start of next class. Lab #4 - Due in one week. Schematics will be drawn using KiCad. Logic Probe Reading | |
| Sep 25 | Go over HW #5 | HW #6 Due Sep 30 at start of class. | ||
| Sep 30 | Adders, Binary Addition, 2's Comp | 2's Comp | Lecture PPT Lecture Notes | HW #7 Due start of next class. Lab #5 - Due at end of lab. |
| Oct 2 | Complex TTL Devices | Chp 6 | Lecture Notes | |
| Oct 7 | Return Test #1 Answer any questions for Test #2 Discuss Lab #6 | Lab #6 - with a partner, build the Circuit and complete the handout and submit electronically. 7-Seg Datasheet 7447 Datasheet | ||
| Oct 9 | TEST #2 Boolean, Universal Gates. | |||
| Oct 14 | Fall Break | |||
| Oct 16 | No Class (instructor out of town) | |||
| Oct 21 | K-Maps | K-Maps | Class Notes | Lab #7 - Formal Lab Report due at start of lab on Nov 4 via electronic and paper submissions. (Optional Draft due Oct 28) HW #8 - Due start of next tuesday's class. |
| Oct 23 | No Class (instructor out) Work on HW #8 and Lab #7 | |||
| Oct 28 | | | |||
| Oct 30 | | | |||
| Nov 4 | | | |||
| Nov 6 | K-Map Review 555 Timers Intro to Latches and Flip Flops | 555 Timer Notes 555 Notebook | Lecture Notes Simulations | HW #8b - Due start of next tuesday's class. |
| Nov 11 | K-Map HW Review FF/Latch (Cont) | HW #9 - Go the the link, log in using your name and your gradewatch password and select attempt 1 and the SR D FF Latch assignment. Fill in the correct answers for each timing diagram (using underscore and minus for Low and High respectively). When submitted review your mistakes. If you missed more than one, repeat (incrementing the attempt number by one each time until you get at least 7 out of 8). Due: Nov 18 at start of class. Grading: score achieved minus 5 points off for each addititional attempt. Lab #8 - Due end of lab. Full user's manual for the scope can be found HERE. | ||
| Nov 13 | TEST #3 K-Maps, Binary Math (2s Comp), Adders and Complex TTL Devices (Stressing K-Maps) | |||
| Nov 18 | Intro to Counters | Lecture Notes | Lab #9 - BCD Counter - due at start of next week's lab. Instructor will accept inperson OR Youtube Videos for demo. Note: We are low on 7400 IC's. You can use a 7401 IC instead, but the pinout is different (refer to data sheet) and you MUST put a 1K resistor from the output pin to 5V or it will NOT work correctly! KiCad Parts/Symbols Lab09a Scope Setup Lab09b scope setup HW #10 - Go the the link, log in using your name and your gradewatch password and select attempt 1 and the JK Flip Flop assignment. Fill in the correct answers for each timing diagram (using underscore and minus for Low and High respectively). When submitted review your mistakes. If you missed more than one, repeat (incrementing the attempt number by one each time until you get at least 3 out of 4). Due: Start of class in one week. Grading: 5 points off for each additional attempt. Since 3/4 is only a 75% (without repeat penalty), you may continue to attempt until you get them all right (with the 5% per try will only be deducted for those repeats under 3/4). | |
| Nov 20 | Design of Sync Counters | Design of Synchronous Counters make sure you have version 1.2 with the fix of the equations in step 5 of the first example | Final Lab Project - Due Study day (Dec 4, 2025) by 5pm. Excel Template Sequence Assignment Site | |
| Nov 25 | TEST #4 Optional test on Latches, Flip-Flops, Timing Diagrams, Definitions Will drop the lowest of the 4 test scores if test #4 is taken. | Work on Final Lab Project | ||
| Nov 27 | Thanksgiving Break (no class) | |||
| Dec 2 | Exam Review | Work on final lab project | ||
| Dec 11 (8am - 10am) | Comprehensive Exam | |||