| Date | Topic | Reading | Handouts | Assignments |
|---|---|---|---|---|
| Aug 26 | Welcome Course Policies Intro to Digital | Chp 1 PPT | ||
| Aug 28 | Number Systems No Lab Today | Number Systems (Bin, Hex, Oct) | Chp 2 PPT | Assignment 1 - Number Conversions (due Sep 4 at start of class). Submit via same link for instant feedback AND submit hand written work at start of class for credit and only one submission will be accepted for this assignment! |
| Sep 2 | Labor Day (no class) | |||
| Sep 4 | Basic Gates | Chp 3 PPT Simulations | Lab 1 - Basic Logic Gates. Make sure you demo each circuit to the instructor for sign off. Due end of lab. | |
| Sep 9 | Logic Circuits Combining Gates Deriving Truth Table Deriving Boolean Equation | Typed notes Simulations | HW #2 - Due next class (Sep 11) at start of class (paper copy). | |
| Sep 11 | Boolean Algebra | Notes (Prev Year, but same material) | Lab #2 - Due end of lab. | |
| Sep 16 | No Class (Family Emergency) | |||
| Sep 18 | No Class / Lab (Family Emergency) | |||
| Sep 23 | Boolean Algebra (Cont) | Notes (Prev Year, but same material) DeMoregan's Theorem Chp 7 (All About Circuits) | HW #3 In class but turn in next class HW #4 Due start of next class | |
| Sep 25 | Go over HW #4 SOP and Demorgan Universal Gates | SOP/POS Handout SOP/POS Simulation Universal Gates Universal Gate Simulation | Lab #3 - Due end of lab. HW #5 Due start of next Wendsday. | |
| Sep 30 | TEST #1 All material covered up to the start of boolean algebra (Lecture Sep 11), Lab #1 and Lab #2 (exclude question on boolean algebra minimization) | |||
| Oct 2 | Schematics / Lab | Lab #4 - Due in one week. Schematics will be drawn using KiCad. Logic Probe Reading | ||
| Oct 7 | Adders, Binary Addition, 2's Comp | 2's Comp | Lecture Notes | HW #6 Due Oct 16 at start of class. HW #7 - Due Oct 23 at start of class. |
| Oct 9 | No Class / Lab (Instructor out of town) | |||
| Oct 14 | Fall Break | |||
| Oct 16 | No Class / Lab (Instructor out of town) | |||
| Oct 21 | TEST #2 Boolean, Universal Gates. | |||
| Oct 23 | Complex TTL Devices | Chp 6 | Lecture Notes | Lab #5 - Due at end of lab. |
| Oct 28 | K-Maps | K-Maps | Class Notes | HW #8 - Due start of next monday's class (but strongly encourage you to have it done by start of next class). |
| Oct 30 | Discuss Lab #6 | Lab #6 - Formal Lab Report due at start of lab on Nov 13 via electronic and paper submissions. (Optional Draft due Nov 6) | ||
| Nov 4 | Intro to Latches and Flip Flops | Lecture Notes Simulations | ||
| Nov 6 | SR and D (Cont) | HW #9 - Go the the link, log in using your name and your gradewatch password and select attempt 1 and the SR D FF Latch assignment. Fill in the correct answers for each timing diagram (using underscore and minus for Low and High respectively). When submitted review your mistakes. If you missed more than one, repeat (incrementing the attempt number by one each time until you get at least 7 out of 8). Due: Nov 13 at start of class. Grading: score achieved minus 5 points off for each addititional attempt. Lab #7 - Due end of lab. Full user's manual for the scope can be found HERE. | ||
| Nov 11 | TEST #3 K-Maps, Binary Math (2s Comp), Adders and Complex TTL Devices (Stressing K-Maps) | |||
| Nov 13 | JK Flip Flops 555 Timers Intro to Counters | 555 Timer Notes 555 Notebook | Lecture Notes Simulations Lecture Notes | Lab #10 - due at start of next week's lab. HW #10 - Go the the link, log in using your name and your gradewatch password and select attempt 1 and the JK Flip Flop assignment. Fill in the correct answers for each timing diagram (using underscore and minus for Low and High respectively). When submitted review your mistakes. If you missed more than one, repeat (incrementing the attempt number by one each time until you get at least 3 out of 4). Due: Start of class in one week. Grading: 5 points off for each additional attempt. Since 3/4 is only a 75% (without repeat penalty), you may continue to attempt until you get them all right (with the 5% per try will only be deducted for those repeats under 3/4). |
| Nov 18 | Async Counters Intro to Design of Sync Counters | Design of Synchronous Counters | Prelab for Lab #11 - it is suggested that you design, simulate and draw the schematic of the BCD counter BEFORE LAB! | |
| Nov 20 | Work on Lab #11 (Go directly to Lab) | Lab #11 (see prelab above) | ||
| Nov 25 | Final Lab Project (Go Directly to Lab) | Final Lab Project - Due Study day (Dec 5, 2024) by 3pm. Excel Template Sequence Assignment Site | ||
| Nov 27 | Thanksgiving Break (no class) | |||
| Dec 2 | Exam Review | |||
| Dec 4 | Work on Final Lab Project (Go Directly to Class) | |||
| Dec 11 (5:30 pm - 7:30 pm) | Comprehensive Exam | |||